A DC-DC converter is a well-known electrical device that accepts a DC input voltage and provides a DC output voltage. For many applications, DC-DC converters are configured to provide a regulated DC output voltage to a load based on an unregulated DC input voltage; generally, a DC-DC converter may be employed to transform an unregulated voltage provided by any of a variety of DC power sources to a more appropriate regulated voltage for driving a given load. In many common power supply implementations, the unregulated DC input voltage is derived from an AC power source, such as a 120 Vrms/60 Hz AC line voltage which is rectified and filtered by a bridge rectifier/filter circuit arrangement. In this case, as discussed further below, protective isolation components generally are employed in the DC-DC converter to ensure safe operation, given the potentially dangerous voltages involved.
FIG. 1 illustrates a circuit diagram of a conventional step-down DC-DC converter 50 configured to provide a regulated DC output voltage 32 (Vout) to a load 40, based on a higher unregulated DC input voltage 30 (Vin). The step-down converter of FIG. 1 also is commonly referred to as a “buck” converter. From a functional standpoint, the buck converter of FIG. 1 generally is representative of other types of DC-DC converters, some examples of which are discussed in turn below.
DC-DC converters like the buck converter of FIG. 1 employ a transistor or equivalent device that is configured to operate as a saturated switch which selectively allows energy to be stored in an energy storage device (e.g., refer to the transistor switch 20 and the inductor 22 in FIG. 1). Although FIG. 1 illustrates such a transistor switch as a bipolar junction transistor (BJT), field effect transistors (FETs) also may be employed as switches in various DC-DC converter implementations. By virtue of employing such a transistor switch, DC-DC converters also are commonly referred to as “switching regulators” due to their general functionality.
In particular, the transistor switch 20 in the circuit of FIG. 1 is operated to periodically apply the unregulated DC input voltage 30 (Vin) across an inductor 22 (L) for relatively short time intervals (in FIG. 1 and the subsequent figures, unless otherwise indicated, a single inductor is depicted to schematically represent one or more actual inductors arranged in any of a variety of serial/parallel configurations to provide a desired inductance). During the intervals in which the transistor switch is “on” or closed (i.e., passing the input voltage Vin to the inductor), current flows through the inductor based on the applied voltage and the inductor stores energy in its magnetic field. When the switch is turned “off” or opened (i.e., the DC input voltage is removed from the inductor), the energy stored in the inductor is transferred to a filter capacitor 34 which functions to provide a relatively smooth DC output voltage Vout to the load 40 (i.e., the capacitor provides essentially continuous energy to the load between inductor energy storage cycles).
More specifically, in FIG. 1, when the transistor switch 20 is on, a voltage VL=Vout−Vin is applied across the inductor 22. This applied voltage causes a linearly increasing current IL to flow through the inductor (and to the load and the capacitor) based on the relationship VL=L·dIL/dt. When the transistor switch 20 is turned off, the current IL through the inductor continues to flow in the same direction, with the diode 24 (D1) now conducting to complete the circuit. As long as current is flowing through the diode, the voltage VL across the inductor is fixed at Vout−Vdiode, causing the inductor current IL to decrease linearly as energy is provided from the inductor's magnetic field to the capacitor and the load. FIG. 2 is a diagram illustrating various signal waveforms for the circuit of FIG. 1 during the switching operations described immediately above.
Conventional DC-DC converters may be configured to operate in different modes, commonly referred to as “continuous” mode and “discontinuous” mode. In continuous mode operation, the inductor current IL remains above zero during successive switching cycles of the transistor switch, whereas in discontinuous mode, the inductor current starts at zero at the beginning of a given switching cycle and returns to zero before the end of the switching cycle. To provide a somewhat simplified yet informative analysis of the circuit of FIG. 1, the discussion below considers continuous mode operation, and assumes for the moment that there are no voltage drops across the transistor switch when the switch is on (i.e., conducting) and that there is a negligible voltage drop across the diode D1 while the diode is conducting current. With the foregoing in mind, the changes in inductor current over successive switching cycles may be examined with the aid of FIG. 3.
FIG. 3 is a graph on which is superimposed the voltage at the point VX shown in FIG. 1 (again, ignoring any voltage drop across the diode D1) based on the operation of the transistor switch 20, and the current through the inductor IL for two consecutive switching cycles. In FIG. 3, the horizontal axis represents time t and a complete switching cycle is represented by the time period T, wherein the transistor switch “on” time is indicated as ton and the switch “off” time is indicated as toff (i.e., T=ton+toff).
For steady state operation, it should be appreciated that the inductor current IL at the start and end of a switching cycle is essentially the same, as can be observed in FIG. 3 by the indication Io. Accordingly, from the relation VL=L·dIL/dt, the change of current dIL over one switching cycle is zero, and may be given by:
      dI    L    =      0    =                  1        L            ⁢              (                                            ∫              0                              t                on                                      ⁢                                          (                                                      V                    in                                    -                                      V                    out                                                  )                            ⁢                                                          ⁢                              ⅆ                t                                              +                                    ∫                              t                on                            T                        ⁢                                          (                                  -                                      V                    out                                                  )                            ⁢                                                          ⁢                              ⅆ                t                                                    )            which simplifies to
                              (                                    V              in                        -                          V              out                                )                ⁢                  t          on                    -                        (                      V            out                    )                ⁢                  (                      T            -                          t              on                                )                      =    0    or                              V          out                          V          in                    =                                    t            on                    T                =        D              ,  where D is defined as the “duty cycle” of the transistor switch, or the proportion of time per switching cycle that the switch is on and allowing energy to be stored in the inductor. From the foregoing, it can be seen that the ratio of the output voltage to the input voltage is proportional to D; namely, by varying the duty cycle D of the switch in the circuit of FIG. 1, the output voltage Vout may be varied with respect to the input voltage Vin but cannot exceed the input voltage, as the maximum duty cycle D is 1.
Hence, as mentioned earlier, the conventional buck converter of FIG. 1 is particularly configured to provide to the load 40 a regulated output voltage Vout that is lower than the input voltage Vin. To ensure stability of the output voltage Vout, as shown in FIG. 1, the buck converter employs a feedback control loop 46 to control the operation of the transistor switch 20. Generally, as indicated in FIG. 1 by connection 47, power for various components of the feedback control loop 46 may be derived from the DC input voltage Vin or alternatively another independent source of power.
In the feedback control loop 46 of FIG. 1, a scaled sample voltage Vsample of the DC output voltage Vout is provided as an input to the feedback control loop 46 (e.g., via the resistors R2 and R3) and compared by an error amplifier 28 to a reference voltage Vref. The reference voltage Vref is a stable scaled representation of the desired regulated output voltage Vout. The error amplifier 28 generates an error signal 38 (in this example, a positive voltage signal over some predetermined range) based on the comparison of Vsample and Vref and the magnitude of this error signal ultimately controls the operation of the transistor switch 20, which in turn adjusts the output voltage Vout via adjustments to the switch's duty cycle. In this manner, the feedback control loop maintains a stable regulated output voltage Vout.
More specifically, the error signal 38 serves as a control voltage for a pulse width modulator 36 which also receives a pulse stream 42 having a frequency f=1/T provided by an oscillator 26. In conventional DC-DC converters, exemplary frequencies f for the pulse stream 42 include, but are not limited to, a range from approximately 50 kHz to 100 kHz. The pulse width modulator 36 is configured to use both the pulse stream 42 and the error signal 38 to provide an on/off control signal 44 that controls the duty cycle of the transistor switch 20. In essence, a pulse of the pulse stream 42 acts as a “trigger” to cause the pulse width modulator to turn the transistor switch 20 on, and the error signal 38 determines how long the transistor switch stays on (i.e., the length of the time period ton and hence the duty cycle D).
For example, if the error signal 38 indicates that the sampled output voltage Vsample is higher than Vref (i.e., the error signal 38 has a relatively lower value), the pulse width modulator 36 is configured to provide a control signal 44 with relatively shorter duration “on” pulses or a lower duty cycle, thereby providing relatively less energy to the inductor while the transistor switch 20 is on. In contrast, if the error signal 38 indicates that Vsample is lower than Vref (i.e., the error signal has a relatively higher value), the pulse width modulator is configured to provide a control signal with relatively longer duration “on” pulses or a higher duty cycle, thereby providing relatively more energy to the inductor while the transistor switch 20 is on. Accordingly, by modulating the duration of the “on” pulses of the control signal 44 via the error signal 38, the output voltage Vout is regulated by the feedback control loop 46 to approximate a desired output voltage represented by Vref.
Other types of conventional DC-DC converters in addition to the buck converter discussed above in connection with FIG. 1 include, for example, a step-up or “boost” converter which provides a regulated DC output voltage that is higher than the input voltage, an inverting or “buck-boost” converter that may be configured to provide a regulated DC output voltage that is either lower or higher than the input voltage and has a polarity opposite to that of the input voltage, and a “CUK” converter that is based on capacitive coupled energy transfer principles. Like the buck converter, in each of these other types of converters the duty cycle D of the transistor switch determines the ratio of the output voltage Vout to the input voltage Vin.
FIG. 4 illustrates a conventional boost converter 52 and FIG. 5 illustrates a conventional buck-boost converter or inverting regulator 54. Both of these converters may be analyzed similarly to the buck converter of FIG. 1 to determine how the duty cycle D affects the ratio Vout/Vin. FIG. 6 illustrates an example of a “CUK” converter 56, which employs capacitive coupling rather than primarily inductive coupling. The circuit of FIG. 6 is derived from a duality principle based on the buck-boost converter of FIG. 5 (i.e., the relationship between the duty cycle D and the ratio Vout/Vin in the CUK converter is identical to that of the buck-boost converter). One noteworthy characteristic of the CUK converter is that the input and output inductors L1 and L2 shown in FIG. 6 create a substantially smooth current at both the input and the output of the converter, while the buck, boost, and buck-boost converters have either a pulsed input current (e.g., see FIG. 2, second diagram from top) or a pulsed output current.
For all of the converters shown in FIGS. 4-6, the details of the voltage regulation feedback control loop have been omitted for simplicity; however, it should be appreciated that like the buck converter shown in FIG. 1, each of the converters shown in FIGS. 4-6 would include a feedback control loop to provide output voltage regulation, as discussed above in connection with FIG. 1.
For many electronics applications, power supplies may be configured to provide a regulated DC output voltage from an input AC line voltage (e.g., 120 Vrms, 60 Hz). In some power supplies based on switching regulators, an unregulated DC voltage may be provided as an input to a DC-DC converter directly from a rectified and filtered AC line voltage. Such an arrangement implies that there is no protective isolation between the AC line voltage and the DC input voltage to the DC-DC converter. Also, the unregulated DC input voltage to the converter may be approximately 160 Volts DC (based on a rectified 120 Vrms, line voltage) or higher (up to approximately 400 Volts if power factor correction is employed, as discussed below in connection with FIGS. 8A and 8B), which is potentially quite dangerous. In view of the foregoing, DC-DC converters for such power supply arrangements typically are configured with isolation features to address these issues so as to generally comport with appropriate safety standards.
FIG. 7 is a circuit diagram illustrating an example of such a power supply 66 incorporating a DC-DC converter or switching regulator. As discussed above, the power supply 66 receives as an input an AC line voltage 67 which is rectified by a bridge rectifier 68 and filtered by a capacitor 35 (Cfilter) to provide an unregulated DC voltage as an input Vin, to the DC-DC converter portion 69. The DC-DC converter portion 69 is based on the inverting regulator (buck-boost) arrangement shown in FIG. 5; however, in FIG. 7, the energy-storage inductor has been replaced with a high frequency transformer 72 to provide isolation between the unregulated high DC input voltage Vin and the DC output voltage Vout. Such a DC-DC converter arrangement incorporating a transformer rather than an inductor commonly is referred to as a “flyback” converter.
In the circuit of FIG. 7, the “secondary side” of the converter portion 69 (i.e., the diode D1 and the capacitor C) is arranged such that the converter provides an isolated DC output voltage. The DC-DC converter portion 69 also includes an isolation element 70 (e.g., a second high-frequency transformer or optoisolator) in the voltage regulation feedback control loop to link the error signal from the error amplifier 28 to the modulator 36 (the error signal input to and output from the isolation element 70 is indicated by the reference numerals 38A and 38B).
In view of the various isolation features in the circuit of FIG. 7, although not shown explicitly in the figure, it should be appreciated that power for the oscillator/modulation circuitry generally may be derived from the primary side unregulated higher DC input voltage Vin, whereas power for other elements of the feedback control loop (e.g., the reference voltage Vref, the error amplifier 28) may be derived from the secondary side regulated DC output voltage Vout. Alternatively, as mentioned above, power for the components of the feedback loop may in some cases be provided by an independent power source.
Because of the switching nature of DC-DC converters, these apparatus generally draw current from a power source in a pulsed manner. This condition may have some generally undesirable effects when DC-DC converters draw power from an AC power source (e.g., as in the power supply arrangements of FIG. 7).
In particular, for maximum power efficiency from an AC power source, the input current ultimately drawn from the AC line voltage ideally should have a sinusoidal wave shape and be in phase with the AC line voltage. This situation commonly is referred to as “unity power factor,” and generally results with purely resistive loads. The switching nature of the DC-DC converter and resulting pulsed current draw (i.e., and corresponding significantly non-sinusoidal current draw from the AC power source) causes these apparatus to have less than unity power factor, and thus less than optimum power efficiency. Additionally, with reference again to FIG. 7, the presence of a substantial filter capacitor 35 (Cfilter) between the bridge rectifier 68 and DC-DC converter 69 further contributes to making the overall load on the bridge rectifier less resistive, resulting in appreciably less than unity power factor.
More specifically, the “apparent power” drawn from an AC power source by a load that is not a purely resistive load is given by multiplying the RMS voltage applied to the load and the RMS current drawn by the load. This apparent power reflects how much power the device appears to be drawing from the source. However, the actual power drawn by the load may be less than the apparent power, and the ratio of actual to apparent power is referred to as the load's “power factor.” For example, a device that draws an apparent power of 100 Volt-amps and has a 0.5 power factor actually consumes 50 Watts of power, not 100 Watts; stated differently, in this example, a device with a 0.5 power factor appears to require twice as much power from the source than it actually consumes.
As mentioned above, conventional DC-DC converters characteristically have significantly less than unity power factor due to their switching nature and pulsed current draw. Additionally, if the DC-DC converter were to draw current from the AC line voltage with only intervening rectification and filtering, the pulsed non-sinusoidal current drawn by the DC-DC converter would place unwanted stresses and introduce generally undesirable noise and harmonics on the AC line voltage (which may adversely affect the operation of other devices).
In view of the foregoing, some conventional switching power supplies are equipped with, or used in conjunction with, power factor correction apparatus that are configured to address the issues noted above and provide for a more efficient provision of power from an AC power source. In particular, such power factor correction apparatus generally operate to “smooth out” the pulsed current drawn by a DC-DC converter, thereby lowering its RMS value, reducing undesirable harmonics, improving the power factor, and reducing the chances of an AC mains circuit breaker tripping due to peak currents.
In some conventional arrangements, a power factor correction apparatus is itself a type of switched power converter device, similar in construction to the various DC-DC converters discussed above, and disposed for example between an AC bridge rectifier and a filtering capacitor that is followed by a DC-DC converter. This type of power factor correction apparatus acts to precisely control its input current on an instantaneous basis so as to substantially match the waveform and phase of its input voltage (i.e., a rectified AC line voltage). In particular, the power factor correction apparatus may be configured to monitor a rectified AC line voltage and utilize switching cycles to vary the amplitude of the input current waveform to bring it closer into phase with the rectified line voltage.
FIG. 8 is a circuit diagram generally illustrating such a conventional power factor correction apparatus 520. As discussed above, the power factor correction apparatus is configured so as to receive as an input 65 the full-wave rectified AC line voltage VAC from the bridge rectifier 68, and provide as an output the voltage Vin that is then applied to a DC-DC converter portion of a power supply (e.g., with reference to FIG. 7, the power factor correction apparatus 520, including the filter capacitor 35 across an output of the apparatus 520, would be disposed between the bridge rectifier 68 and the DC-DC converter portion 69). As can be seen in FIG. 8, a common example of a power factor correction apparatus 520 is based on a boost converter topology (see FIG. 4 for an example of a DC-DC converter boost configuration) that includes an inductor LPFC, a switch SWPFC, a diode DPFC, and the filter capacitor 35 across which the voltage Vin is generated.
The power factor correction apparatus 520 of FIG. 8 also includes a power factor correction (PFC) controller 522 that monitors the rectified voltage VAC, the generated voltage Vin provided as an output to the DC-DC converter portion, and a signal 71 (Isamp) representing the current IAC drawn by the apparatus 520. As illustrated in FIG. 8, the signal Isamp may be derived from a current sensing element 526 (e.g., a voltage across a resistor) in the path of the current IAC drawn by the apparatus. Based on these monitored signals, the PFC controller 522 is configured to output a control signal 73 to control the switch 75 (SWPFC) such that the current IAC has a waveform that substantially matches, and is in phase with, the rectified voltage VAC.
FIG. 9 is a diagram that conceptually illustrates the functionality of the PFC controller 522. Recall that, generally speaking, the function of the power factor correction apparatus 520 as a whole is to make itself look essentially like a resistance to an AC power source; in this manner, the voltage provided by the power source and the current drawn from the power source by the “simulated resistance” of the power factor correction apparatus have essentially the same waveform and are in phase, resulting in substantially unity power factor. Accordingly, a quantity RPFC may be considered as representing a conceptual simulated resistance of the power factor correction apparatus, such that, according to Ohm's law,VAC=IACRPFCorGPFCVAC=IAC,where GPFC=1/RPFC and represents an effective conductance of the power factor correction apparatus 520.
With the foregoing in mind, the PFC controller 522 shown in FIG. 9 implements a control strategy based on two feedback loops, namely a voltage feedback loop and a current feedback loop. These feedback loops work together to manipulate the instantaneous current IAC drawn by the power factor correction apparatus based on a derived effective conductance GPFC for the power factor correction apparatus. To this end, a voltage feedback loop 524 is implemented by comparing the voltage Vin (provided as an output across the filter capacitor 35) to a reference voltage VrefPFC representing a desired regulated value for the voltage Vin. The comparison of these values generates an error voltage signal Ve which is applied to an integrator/low pass filter having a cutoff frequency of approximately 10-20 Hz. This integrator/low pass filter imposes a relatively slow response time for the overall power factor control loop, which facilitates a higher power factor; namely, because the error voltage signal Ve changes slowly compared to the line frequency (which is 50 or 60 Hz), adjustments to IAC due to changes in the voltage Vin (e.g., caused by sudden and/or significant load demands) occur over multiple cycles of the line voltage rather than abruptly during any given cycle.
In the controller shown in FIG. 9, a DC component of the slowly varying output of the integrator/low pass filter essentially represents the effective conductance GPFC of the power factor correction apparatus; hence, the output of the voltage feedback loop 524 provides a signal representing the effective conductance GPFC. Accordingly, based on the relationship given above, the PFC controller 522 is configured to multiply this effective conductance by the monitored rectified line voltage VAC to generate a reference current signal I*AC representing the desired current to be drawn from the line voltage, based on the simulated resistive load of the apparatus 520. This signal I*AC thus provides a reference or “set-point” input to the current control loop 528.
In particular, as shown in FIG. 9, in the current control loop 528, the signal I*AC is compared to the signal Isamp which represents the actual current IAC being drawn by the apparatus 520. The comparison of these values generates a current error signal Ie that serves as a control signal for a pulse width modulated (PWM) switch controller. The PWM switch controller in turn outputs a signal 73 to control the switch SWPFC so as to manipulate the actual current IAC being drawn (refer again to FIG. 8). Exemplary frequencies commonly used for the control signal 73 output by the PWM switch controller (and hence for the switch SWPFC) are on the order of approximately 100 kHz. With the foregoing in mind, it should be appreciated that it is the resulting average value of a rapidly varying IAC that resembles a full-wave rectified sinusoidal waveform (e.g., having a frequency of two times the frequency of the line voltage), with an approximately 100 kHz ripple resulting from the switching operations. Accordingly, the current feedback loop and the switch control elements have to have enough bandwidth to follow a full-wave rectified waveform (hence, a bandwidth of a few KHz generally is more than sufficient).
It should be appreciated that the foregoing discussion in connection with FIGS. 8 and 9 is primarily conceptual in nature to provide a general understanding of the power factor correction functionality. Presently, integrated circuit power factor correction controllers that may be employed as the PFC controller 522 shown in FIGS. 8 and 9 are available from various manufacturers (e.g., the Fairchild Semiconductor ML4821 PFC controller, the Linear Technology LT1248 or LT1249 PFC controllers, the ST Microelectronics L6561 PFC controller, etc.). Such controllers generally may be configured to operate the power factor correction apparatus 520 in either continuous or discontinuous switching modes (or around a boundary between continuous and discontinuous modes).
Thus, in the conventional power factor correction schemes outlined in connection with FIGS. 8 and 9, the power factor correction apparatus 520 provides as an output the regulated voltage Vin across the capacitor 35, from which current may be drawn as needed by a load coupled to Vin (e.g., by a subsequent DC-DC converter portion of a power supply). For sudden and/or excessive changes in load power requirements, the instantaneous value of the voltage Vin may change dramatically; for example, in instances of sudden high load power requirements, energy reserves in the capacitor are drawn upon and Vin may suddenly fall below the reference VrefPFC. As a result, the voltage feedback loop 524, with a relatively slow response time, attempts to adjust Vin by causing the power factor correction apparatus to draw more current from the line voltage. Due to the relatively slow response time, though, this action may in turn cause an over-voltage condition for Vin, particularly if the sudden/excessive demand from the load no longer exists by the time an adjustment to Vin is made. The apparatus then tries to compensate for the over-voltage condition, again subject to the slow response time of the voltage feedback loop 524 leading to some degree of potential instability. Similar sudden changes (either under- or over-voltage conditions) to Vin may result from sudden/excessive perturbations on the line voltage 67, to which the apparatus 520 attempts to respond in the manner described above.
From the foregoing, it should be appreciated that the slow response time that on the one hand facilitates power factor correction at the same time may result in a less than optimum input/output transient response capability. Accordingly, the voltage feedback loop response time/bandwidth in conventional power factor correction apparatus generally is selected to provide a practical balance between reasonable (but less than optimal) power factor correction and reasonable (but less than optimal) transient response.
It should be appreciated that in some switching power supply applications, a power factor correction apparatus may not be required or even significantly effective. For example, for small loads that draw relatively low power from a power source, the power factor of the switching power supply conventionally is considered to be not as important as in higher power applications; presumably, the power drawn by a small load comprises a relatively insignificant portion of the overall power available on a particular AC power circuit.
In contrast, power factor correction may be important for larger loads consuming relatively higher power, in which the input current to the switching power supply may approach the maximum available from the AC power source. Power factor correction also may be important for situations in which several relatively small loads are coupled to the same AC power circuit; if the power factor associated with each of the relatively small loads is low, the net effect of many such low power factor loads coupled to the same AC power circuit may have significant detrimental effects.